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  • FPGA‚Ì“®ì‚É•K—v‚ȍŒáŒÀ‚Ì‹@”\‚𓋍ځB’Pˆê“dŒ¹‚Å‚·‚®‚ÉŠˆ—p‚Å‚«‚Ü‚·
  • –L•x‚È”[“üŽÀÑ‚Å ˆÀS‚µ‚Ä‚šŽg‚¢‚¢‚œ‚Ÿ‚¯‚Ü‚·
  • ACM/XCMƒVƒŠ[ƒY‚Í‚»‚ê‚Œ‚êŠOŒ`‚âƒRƒlƒNƒ^ˆÊ’u‚ª“¯ˆê‚Å’u‚«Š·‚Š‚ª‰Â”\‚Å‚·
  • Šî–{“I‚ɁA‘Š”[‘̐§‚ōŒZ—‚“ú‚©‚炲Šˆ—p‚¢‚œ‚Ÿ‚¯‚Ü‚·
  • –L•x‚ȃ‰ƒCƒ“ƒiƒbƒv‚Å100Ží—ވȏã‚̐»•i‚ð‚²—pˆÓ‚µ‚Ä‚¢‚Ü‚·
  • ƒXƒs[ƒhƒOƒŒ[ƒh•ÏX‚Ȃǂ̃JƒXƒ^ƒ}ƒCƒY‚à‚²‘Š’k‚­‚Ÿ‚³‚¢
  • ‰ñ˜H}Aƒ}ƒjƒ…ƒAƒ‹‚͍w“ü‘O‚Å‚àŽ©—R‚ÉŽQÆ‚Å‚«‚Ü‚·
  • ‚Ù‚Ú‚·‚ׂĂ̐»•i‚ªRoHSŽw—ߑΉž
ACMƒVƒŠ[ƒY
Cyclone V “‹Úƒ{[ƒh@
ACM-027ƒVƒŠ[ƒY
Cyclone V F480 FPGAƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone V FBGA480pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡ACM-027‚ÍEDA-008‚©‚çUSB•”•ª‚ðŽæ‚菜‚¢‚œ‚à‚Ì‚Å‚·
¡“‹ÚƒfƒoƒCƒX
5CEBA2F23C8N
5CEBA4F23C8N
5CEBA5F23C8N
5CEBA7F23C8N
5CEBA9F23C8N
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡JTAG—pƒRƒlƒNƒ^
¡
ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡MRAM
¡”Ä—pLED@‚˜2
¡”Ä—pƒXƒCƒbƒ`@‚˜2
¡ƒXƒe[ƒ^ƒXLED (Power, Done)
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡8‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone V
¡on bord FPGA:
5CEBA2F23C8N
5CEBA4F23C8N
5CEBA5F23C8N
5CEBA7F23C8N
5CEBA9F23C8N
¡Configuration Device
¡JTAG port (10 pin socket)
¡On-board oscillators : 50 MHz
¡100 I/O PADs 100 mil (2.54 mm) grid
¡MRAM
¡User LED x2
¡User Push-Button Switch x2
¡Status LED (Power, Done)
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality eight layers PCB. (Immersion gold)
ACM-027ZƒVƒŠ[ƒY
Cyclone V F480 FPGAƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone V FBGA480pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡ACM-027Z‚ÍACM-027‚©‚çMRAM‚ðÈ‚¢‚œ‚à‚Ì‚Å‚·
¡“‹ÚƒfƒoƒCƒX
5CEBA2F23C8N
5CEBA4F23C8N
5CEBA5F23C8N
5CEBA7F23C8N
5CEBA9F23C8N
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡JTAG—pƒRƒlƒNƒ^
¡
ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pLED@‚˜2
¡”Ä—pƒXƒCƒbƒ`@‚˜2
¡ƒXƒe[ƒ^ƒXLED (Power, Done)
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡8‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone V
¡No MRAM version of ACM-027
¡on bord FPGA:
5CEBA2F23C8N
5CEBA4F23C8N
5CEBA5F23C8N
5CEBA7F23C8N
5CEBA9F23C8N
¡Configuration Device
¡JTAG port (10 pin socket)
¡On-board oscillators : 50 MHz
¡100 I/O PADs 100 mil (2.54 mm) grid
¡User LED x2
¡User Push-Button Switch x2
¡Status LED (Power, Done)
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality eight layers PCB. (Immersion gold)
ACM-109ƒVƒŠ[ƒY
Cyclone V FPGAƒ{[ƒh


[SW] [LED] [IO:128]
¡Cyclone V ‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
5CEBA2U15C8N
5CEBA4U15C8N
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡JTAG—pƒRƒlƒNƒ^
¡
ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡128–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡ƒIƒvƒVƒ‡ƒ“‚ÅSPI-MRAM“‹Ú‰Â”\
¡”Ä—pLED@‚˜1
¡”Ä—pƒXƒCƒbƒ`@‚˜1
¡ƒXƒe[ƒ^ƒXLED (Power, Done)
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡8‘wŠî”̗p

¡FPGA board equipped with Altera Cyclone V
¡on bord FPGA:
5CEBA2U15C8N
5CEBA4U15C8N
¡Configuration Device
¡JTAG port (10 pin socket)
¡On-board oscillators : 50 MHz
¡128 I/O, Two HIROSE connector
¡MRAMs are available as BTO option
¡User LED x1
¡User Switch x1
¡Status LED (Power, Done)
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality eight layers PCB.(Immersion gold)
ACM-206ƒVƒŠ[ƒY
Cyclone V FPGAƒ{[ƒh


[SW] [LED] [IO:296]
¡Cyclone V ‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
5CEFA7F31C8N
5CEFA9F31C8N
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡JTAG—pƒRƒlƒNƒ^
¡
ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡296–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pLED@‚˜2
¡”Ä—pƒXƒCƒbƒ`@‚˜2
¡ƒXƒe[ƒ^ƒXLED (Power, Done)
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡8‘wŠî”̗p

¡FPGA board equipped with Altera Cyclone V
¡on bord FPGA:
5CEFA7F31C8N
5CEFA9F31C8N
¡Configuration Device
¡JTAG port (10 pin socket)
¡On-board oscillators : 50 MHz
¡296 I/O, Four HIROSE connectors
¡User LED x2
¡User Switch x2
¡Status LED (Power, Done)
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality eight layers PCB.(Immersion gold)
ACM-305ƒVƒŠ[ƒY
Cyclone V F480 FPGAƒ{[ƒh


[SW] [LED] [IO:56]
¡Cyclone V ‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
5CEBA2U15C8N
5CEBA4U15C8N
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡JTAG—pƒRƒlƒNƒ^
¡
ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡56–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡MRAM
¡”Ä—pLED@‚˜1
¡”Ä—pƒXƒCƒbƒ`@‚˜2
¡ƒXƒe[ƒ^ƒXLED (Power, Done)
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡8‘wŠî”̗p

¡FPGA board equipped with Altera Cyclone V
¡on bord FPGA:
5CEBA2U15C8N
5CEBA4U15C8N
¡Configuration Device
¡JTAG port (10 pin socket)
¡On-board oscillators : 50 MHz
¡56 I/O PADs 100 mil (2.54 mm) grid
¡MRAM
¡User LED x1
¡User Switch x2
¡Status LED (Power, Done)
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality eight layers PCB.(Immersion gold)
ACM-305ZƒVƒŠ[ƒY
Cyclone V F480 FPGAƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone V FBGA480pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡ACM-305Z‚ÍACM-305‚©‚çMRAM‚ðÈ‚¢‚œ‚à‚Ì‚Å‚·
¡“‹ÚƒfƒoƒCƒX
5CEBA2U15C8N
5CEBA4U15C8N
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡JTAG—pƒRƒlƒNƒ^
¡
ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡56–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pLED@‚˜1
¡”Ä—pƒXƒCƒbƒ`@‚˜2
¡ƒXƒe[ƒ^ƒXLED (Power, Done)
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡8‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone V
¡No MRAM version of ACM-305
¡on bord FPGA:
5CEBA2U15C8N
5CEBA4U15C8N
¡Configuration Device
¡JTAG port (10 pin socket)
¡On-board oscillators : 50 MHz
¡56 I/O PADs 100 mil (2.54 mm) grid
¡User LED x1
¡User Switch x2
¡Status LED (Power, Done)
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality eight layers PCB.(Immersion gold)
EDA-008
Cyclone V USB-FPGAƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone V‚ÌFBGA480pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒXF5CEBA7F23C8N

¡USBŒo—R‚ÅFPGAƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“
¡USBƒ†[ƒU’ʐMƒ|[ƒg
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡MRAM
¡”Ä—pƒXƒCƒbƒ`@‚˜2
¡”Ä—pLED@‚˜2
¡ƒXƒe[ƒ^ƒXLED (Power, Done)
¡5V“dŒ¹“®ì
¡USBƒ‰ƒCƒ“‚ÌESD•ÛŒì‚š‚æ‚уT[ƒW•ÛŒì
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡CNB‚ÌI/O“dŒ¹iVIO(B)j‚ð•Ê“r‹Ÿ‹‹‰Â”\
¡€•i‚É‚ÍŽ©K—p‚̃eƒLƒXƒg‚âƒTƒ“ƒvƒ‹‚È‚Ç‚ÍŠÜ‚Ü‚ê‚Ü‚¹‚ñ
¡FPGA board equipped with Altera Cyclone V
¡on bord FPGA: 5CEBA7F23C8N
¡FPGA configuration via USB interface
¡USB control IC
¡Configuration Device
¡50MHz Oscillator (50 ppm)
¡Power-on Reset IC
¡MRAM
¡User Switch x2
¡User LED x2
¡Status LED (Power, Done)
¡5.0 V single power supply operation
¡ESD and Surge protection component for USB I/F
¡100 I/O PADs 100 mil (2.54 mm) grid
EDA-302
Cyclone V USB-FPGAƒ{[ƒh


[SW] [LED] [IO:56]
¡Cyclone V‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒXF
5CEBA2U15C8N
5CEBA4U15C8N

¡USBŒo—R‚ÅFPGAƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“
¡USBƒ†[ƒU’ʐMƒ|[ƒg
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡MRAM
¡”Ä—pƒXƒCƒbƒ`@‚˜2
¡”Ä—pLED@‚˜4
¡ƒXƒe[ƒ^ƒXLED (Power, Done)
¡7ƒZƒOƒƒ“ƒgLED•\ŽŠŠí@‚˜1
¡5V“dŒ¹“®ì
¡USBƒ‰ƒCƒ“‚ÌESD•ÛŒì‚š‚æ‚уT[ƒW•ÛŒì
¡56–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡CNB‚ÌI/O“dŒ¹iVIO(B)j‚ð•Ê“r‹Ÿ‹‹‰Â”\
¡8‘wŠî”̗p
¡€•i‚É‚ÍŽ©K—p‚̃eƒLƒXƒg‚âƒTƒ“ƒvƒ‹‚È‚Ç‚ÍŠÜ‚Ü‚ê‚Ü‚¹‚ñ
¡FPGA board equipped with Altera Cyclone V
¡on bord FPGA:
5CEBA2U15C8N
5CEBA4U15C8N
¡FPGA configuration via USB interface
¡USB control IC
¡Configuration Device
¡50MHz Oscillator (50 ppm)
¡Power-on Reset IC
¡MRAM
¡User Switch x2
¡User LED x4
¡Status LED (Power, Done)
¡Seven segment LED module x1
¡5.0 V single power supply operation
¡ESD and Surge protection component for USB I/F
¡56 I/O PADs 100 mil (2.54 mm) grid
¡High quality 8 layer PCB.(Immersion gold)
Arria II “‹Úƒ{[ƒh@
ACM-025ƒVƒŠ[ƒY
Arria II GX F572 FPGAƒ{[ƒh


[SW] [LED] [IO:100]
¡Arria II GX 572pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP2AGX45DF25C6N
EP2AGX65DF25C6N
EP2AGX95DF25C6N
EP2AGX125DF25C6N

¡JTAG—pƒRƒlƒNƒ^@
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN 30MHzA50MHz
¡‚‘¬ƒVƒŠƒAƒ‹•]‰¿‰Â”\
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆøo‚µ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM“‹Ú
¡DDR2 SDRAM“‹Ú
¡”Ä—pLED@‚˜8
¡”Ä—pƒXƒCƒbƒ`@‚˜4
¡ƒXƒe[ƒ^ƒXLED@‚˜2
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H“‹Ú
¡3.3V’Pˆê“dŒ¹“®ì
¡CNB‚ÌVCCIO‚𕪗£‰Â”\ i»‘¢Žž‚É‚Í3.3V‚ŃeƒXƒgj
¡10‘wŠî”̗p
¡FPGA board equipped with Altera Arria II GX
¡on bord FPGA:
EP2AGX45DF25C6N
EP2AGX65DF25C6N
EP2AGX95DF25C6N
EP2AGX125DF25C6N
¡JTAG port (10 pin socket)
¡On-board Oscillators (30MHz, 50MHz)
¡ATLGX High speed serial interface through SIF40 connector
¡100 I/O PAD 100 mil (2.54 mm) grid
¡Configuration Device
¡DDR2 SDRAM
¡External clock inputs through user I/O connectors
¡On-board ALTGX reference clock
¡User LED x8
¡User Switch x4
¡Status LED x2
¡Power-on Reset IC for FPGA configuration
¡3.3 V single power supply operation
¡Separated VCCIO input (VIO(B))
¡High quality ten layers PCB.(Immersion gold)
Cyclone ‡W“‹Úƒ{[ƒh@
ACM-023ƒVƒŠ[ƒY
Cyclone IV E F484 FPGAƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone ‡W E FBGA484pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP4CE55F23C8N
EP4CE75F23C8N
EP4CE75F23C7N
EP4CE115F23C8N
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡JTAG—pƒRƒlƒNƒ^
¡
ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@30MHzA50MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡MRAM
¡”Ä—pLED@‚˜2
¡”Ä—pƒXƒCƒbƒ`@‚˜2
¡ƒXƒe[ƒ^ƒXLED@‚˜2
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡8‘wŠî”̗p
¡I/O‚Ì”zü’·ƒRƒ“ƒgƒ[ƒ‹

¡FPGA board equipped with Altera Cyclone IV E
¡on bord FPGA:
EP4CE55F23C8N
EP4CE75F23C8N
EP4CE75F23C7N
EP4CE115F23C8N
¡Configuration Device
¡JTAG port (10 pin socket)
¡On-board oscillators : 30 MHz and 50 MHz
¡100 I/O PADs 100 mil (2.54 mm) grid
¡MRAM
¡User LED x2
¡User Push-Button Switch x2
¡Status LED x2
¡External clock input via User I/O and MMCX connector pair.
¡Power-on Reset
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality eight layers PCB.(Immersion gold)
ACM-024ƒVƒŠ[ƒY
Cyclone IV GX F484 FPGAƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone ‡W GX@FBGA484pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP4CGX50CF23C8N
EP4CGX75CF23C8N
EP4CGX110CF23C8N
EP4CGX150CF23C7N
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒNi30MHzA50MHzj
¡‚‘¬ƒVƒŠƒAƒ‹I/O•]‰¿‰Â”\
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡DDR2 SDRAM
¡”Ä—pLED@‚˜8
¡”Ä—pƒXƒCƒbƒ`@‚˜4
¡ƒXƒe[ƒ^ƒXLED@‚˜2

¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H“‹Ú
¡3.3V’Pˆê“dŒ¹“®ì
¡VCCIO‚𕪗£‰Â”\i»‘¢Žž‚É‚Í3.3V‚ŃeƒXƒgj
¡10‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone IV GX
¡on bord FPGA:
EP4CGX50CF23C8N
EP4CGX75CF23C8N
EP4CGX110CF23C8N
EP4CGX150CF23C7N
¡JTAG port (10 pin socket)
¡On-board Oscillator, 30MHz and 50MHz
¡ATLGX High speed serial interface through SIF40 connector
¡100 I/O PAD 100 mil (2.54 mm) grid
¡Configuration Device
¡DDR2 SDRAM
¡User LED x8
¡User Switch x4
¡Status LED x2 (Power,Done)
¡External clock inputs through user I/O connector
¡On-board ALTGX reference clock
¡Power-on Reset IC for FPGA configuration
¡3.3 V single power supply operation
¡Separated VCCIO input (VIO(B), VIO(D))
¡High quality ten layers PCB.(Immersion gold)
ACM-107ƒVƒŠ[ƒY
Cyclone IV E F484 FPGAƒ{[ƒh


[SW] [LED] [IO:128]
¡Cyclone ‡W E FBGA484pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP4CE55F23C8N
EP4CE75F23C8N
EP4CE75F23C7N
EP4CE115F23C8N
¡JTAG—pƒRƒlƒNƒ^
¡
ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@30MHzA50MHz
¡128–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡MRAM
¡”Ä—pLED@‚˜2
¡”Ä—pƒXƒCƒbƒ`@‚˜1
¡ƒXƒe[ƒ^ƒXLED@‚˜2
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡8‘wŠî”̗p
¡I/O‚Ì”zü’·ƒRƒ“ƒgƒ[ƒ‹
¡FPGA board equipped with Altera Cyclone IV E
¡on bord FPGA:
EP4CE55F23C8N
EP4CE75F23C8N
EP4CE75F23C7N
EP4CE115F23C8N
¡JTAG port (10 pin socket)
¡on-board oscillators : 30 MHz and 50 MHz
¡Configuration Device
¡128 I/O, Two HIROSE connectors
¡MRAM
¡User LED x2
¡User Push-Button Switch x1
¡Status LED x2 (Power, Done)
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality eight layers PCB.(Immersion gold)
ACM-108ƒVƒŠ[ƒY
Cyclone IV GX F484 FPGAƒ{[ƒh


[SW] [LED] [IO:128]
¡Cyclone ‡W GX@FBGA484pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP4CGX50CF23C8N
EP4CGX110CF23C8N
EP4CGX150CF23C7N
¡DDR2 SDRAM
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@30MHzA50MHz
¡‚‘¬ƒgƒ‰ƒ“ƒV[ƒo[•]‰¿‰Â”\
¡”Ä—pƒXƒCƒbƒ`@‚˜2
¡”Ä—pLED@‚˜2
¡ƒXƒe[ƒ^ƒXLED@‚˜2
¡128–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o
¡JTAG—pƒRƒlƒNƒ^i10ƒsƒ“ƒ\ƒPƒbƒgj
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H“‹Ú
¡3.3V’Pˆê“dŒ¹“®ì
¡VCCIO‚𕪗£‰Â”\i»‘¢Žž‚É‚Í3.3V‚ŃeƒXƒgj
¡8‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone IV GX
¡on bord FPGA:
EP4CGX50CF23C8N
EP4CGX110CF23C8N
EP4CGX150CF23C7N
¡DDR2 SDRAM
¡Configuration Device
¡on-board Oscillator, 30MHz and 50MHz
¡User Switch x2
¡User LED x2
¡Status LED x2
¡128 I/O, Two HIROSE connectors
¡JTAG port (10 pin socket)
¡On-board ALTGX reference clock
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separated CNB VCCIO for variable I/O standard
¡High quality eight layers PCB.(Immersion gold)
ACM-204
Cyclone IV E F780 FPGAƒ{[ƒh


[SW] [LED] [IO:296]
¡Cyclone IV E F780‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP4CE30F29C8N
EP4CE40F29C8N
EP4CE115F29C8N
¡SDRAM
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@30MHzA50MHz
¡”Ä—pƒXƒCƒbƒ`@‚˜5
¡”Ä—pLED@‚˜8
¡ƒXƒe[ƒ^ƒXLED@‚˜2
¡296–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡JTAG—pƒRƒlƒNƒ^i10ƒsƒ“ƒ\ƒPƒbƒgj
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H“‹Ú
¡3.3V’Pˆê“dŒ¹“®ì
¡
VCCIO‚𕪗£‰Â”\i»‘¢Žž‚É‚Í3.3V‚ŃeƒXƒgj
¡10‘wŠî”̗p

¡I/O‚Ì”zü’·ƒRƒ“ƒgƒ[ƒ‹
¡FPGA board equipped with Altera Cyclone IV E
¡on bord FPGA:
EP4CE30F29C8N
EP4CE40F29C8N
EP4CE115F29C8N
¡SDRAM
¡Configuration Device
¡Oscillator : 30 MHz and 50 MHz (50 ppm)
¡User Switch x5
¡User LED x8
¡Status LED x2
¡296 I/O, Four HIROSE connectors
¡JTAG port (10 pin socket)
¡Power-on Reset IC
¡Power : 3.3 V single supply
¡Separable VCCIO
¡High quality ten layer PCB.(Immersion gold)
ACM-205
Cyclone IV E F780 FPGAƒ{[ƒh


[SW] [LED] [IO:296]
¡Cyclone IV E F780‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP4CE30F29C8N
EP4CE40F29C8N
EP4CE115F29C8N
¡DDR2 SDRAM
¡ƒVƒŠƒAƒ‹FLASH-ROM

¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡”Ä—pƒXƒCƒbƒ`@‚˜3
¡”Ä—pLED@‚˜8
¡ƒXƒe[ƒ^ƒXLED@(Power, Done)
¡296–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡JTAG—pƒRƒlƒNƒ^i10ƒsƒ“ƒ\ƒPƒbƒgj
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H“‹Ú
¡3.3V’Pˆê“dŒ¹“®ì
¡
VCCIO‚𕪗£‰Â”\i»‘¢Žž‚É‚Í3.3V‚ŃeƒXƒgj
¡8‘wŠî”̗p

¡I/O‚Ì”zü’·ƒRƒ“ƒgƒ[ƒ‹
¡FPGA board equipped with Altera Cyclone IV E
¡on bord FPGA:
EP4CE30F29C8N
EP4CE40F29C8N
EP4CE115F29C8N
¡DDR2 SDRAM
¡Serial Flash Memory
¡Configuration Device
¡Oscillator : 50 MHz (50 ppm)
¡User Switch x3
¡User LED x8
¡Status LED (Power, Done)
¡296 I/O, Four HIROSE connectors
¡JTAG port (10 pin socket)
¡Power-on Reset IC
¡Power : 3.3 V single supply
¡Separable VCCIO
¡High quality eight layer PCB.(Immersion gold)
EDA-007
ALTERA ‘Ήž@FPGAƒgƒŒ[ƒi


[SW] [LED] [7SEG]
¡Cyclone IV‚𓋍ڂµ‚œFPGAƒgƒŒ[ƒiƒ{[ƒh
¡FTDIŽÐ‚ÌHi-Speed‘ΉžUSBƒ`ƒbƒviFT232Hj‚𓋍ڂµ‚Ä‚š‚èPC‚ƍ‚‘¬‚̒ʐM‚ðs‚€‚±‚Æ‚ª‰Â”\
¡ê—pƒ_ƒEƒ“ƒ[ƒhƒP[ƒuƒ‹‚ª•s—v‚ȁAFPGAƒgƒŒ[ƒiƒ{[ƒh
¡“‹ÚƒfƒoƒCƒXFEP4CE6E22C8N

¡USBŒo—R‚ÅFPGAƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“
¡USB‚©‚ç“dŒ¹‹Ÿ‹‹
¡USBŒo—R‚ÅPC‚ÆFPGA‚̒ʐM‚ª‰Â”\
¡”Ä—pLED@‚˜8
¡7ƒZƒOƒƒ“ƒgLED•\ŽŠŠí@‚˜4
¡‰Ÿ‚µƒ{ƒ^ƒ“ƒXƒCƒbƒ`@‚˜4
¡ˆ³“dƒuƒU[
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@12MHz
¡ƒ†[ƒUI/OiƒZƒ‹ƒtƒeƒXƒg‹@”\j42–{
¡ƒ{[ƒhƒTƒCƒYF80 x 80 [mm]
¡ê—p“§–ŸƒJƒo[
@ƒTƒCƒYF85 x 85 x 17[mm]
¡4‘wŠî”̗p
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM‚Í“‹Ú‚³‚ê‚Ä‚š‚è‚Ü‚¹‚ñ
¡€•i‚É‚ÍŽ©K—p‚̃eƒLƒXƒg‚âƒTƒ“ƒvƒ‹‚È‚Ç‚ÍŠÜ‚Ü‚ê‚Ü‚¹‚ñ
[Domestic sale only]
EDA-301
Cyclone IV USB-FPGAƒ{[ƒh


[SW] [LED] [IO:56]
¡Cyclone IV‚ÌFBGA256pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒXFEP4CE15F17C8N

¡USBŒo—R‚ÅFPGAƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“
¡USBƒ†[ƒU’ʐMƒ|[ƒg
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡‰Ÿ‚µƒ{ƒ^ƒ“ƒXƒCƒbƒ`@1ŒÂ
¡ƒfƒBƒbƒvƒXƒCƒbƒ`@1‰ñ˜H
¡”Ä—pLED@4ŒÂ
¡7ƒZƒOƒƒ“ƒgLED•\ŽŠŠí@1ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡5V“dŒ¹“®ì
¡CNB‚ÌI/O“dŒ¹iVIO(B)j‚ð•Ê“r‹Ÿ‹‹‰Â”\
¡6‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone IV E
¡on bord FPGA: EP4CE15F17C8N
¡FPGA configuration via USB interface
¡USB control IC
¡Configuration Device
¡50MHz Oscillator (50 ppm)
¡Power-on Reset IC
¡User Switch x1
¡User LED x4
¡Seven segment LED module x1
¡Status LED x2 (Power, Done)
¡JTAG port (10 pin socket)
¡JTAG buffer for stable download or debug
¡5.0 V single power supply operation
¡High quality six layer PCB.(Immersion gold)
¡ESD and Surge protection component for USB I/F
Cyclone‡V“‹Úƒ{[ƒh@
ACM-018ƒVƒŠ[ƒY
CycloneIII Q240 ƒuƒŒƒbƒhƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone‡V‚Ì240pinQFP‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP3C16Q240C8N
EP3C40Q240C8N
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN 30MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pLED@‚˜1
¡”Ä—pƒXƒCƒbƒ`@‚˜1
¡ƒXƒe[ƒ^ƒXLED@‚˜2
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹“®ì
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡4‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone III
¡on bord FPGA:
EP3C16Q240C8N
EP3C40Q240C8N
¡Configuration Device
¡JTAG port (10 pin socket)
¡Oscillator : 30 MHz (50 ppm)
¡100 I/O PAD 100 mil (2.54 mm) grid
¡User Switch x1
¡User LED x1
¡Status LED x2
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality four layer PCB.(Immersion gold)
ACM-021ƒVƒŠ[ƒY
CycloneIII F484 ƒuƒŒƒbƒhƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone‡V‚ÌFBGA484pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP3C16F484C8N
EP3C55F484C8N
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHzA50MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pƒ^ƒNƒgƒXƒCƒbƒ` 2ŒÂ
¡”Ä—pLED 2ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹(
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡6‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone III
¡on bord FPGA:
EP3C16F484C8N
EP3C55F484C8N
¡JTAG port (10 pin socket)
¡3.3 V single power supply operation
¡Configuration Device
¡on-board oscillators :30 MHz, 50 MHz
¡100 I/O PAD 100 mil (2.54 mm) grid
¡User Push-Button Switch x2
¡User LED x2
¡Status LED x2
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality six layer PCB.(Immersion gold)
ACM-022ƒVƒŠ[ƒY
CycloneIII F780 ƒuƒŒƒbƒhƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone‡V‚ÌFBGA780pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP3C55F780C8N
EP3C80F780C8N
EP3C120F780C8N
¡SDRAM
¡MRAM

¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN 30MHzA50MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pƒ^ƒNƒgƒXƒCƒbƒ` xŒÂ
¡”Ä—pLED x1
¡ƒXƒe[ƒ^ƒXLED@‚˜2
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹“®ì
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡6‘wŠî”̗p
¡I/O‚Ì”zü’·ƒRƒ“ƒgƒ[ƒ‹
¡FPGA board equipped with Altera Cyclone III
¡on bord FPGA:
EP3C55F780C8N
EP3C80F780C8N
EP3C120F780C8N
¡SDRAM
¡MRAM
¡Configuration Device
¡JTAG port (10 pin socket)
¡30 MHz/50 MHz Oscillator(50 ppm)or External
¡100 I/O PAD 100 mil (2.54 mm) grid
¡User Push-Button Switch x1
¡User LED x1
¡Status LED x2
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality six layer PCB.(Immersion gold)
ACM-029ƒVƒŠ[ƒY
Cyclone III Q240 ƒuƒŒƒbƒhƒ{[ƒh i5VƒŒƒxƒ‹ƒRƒ“ƒo[ƒ^‘•”õj


[LED] [IO:100]
¡Cyclone III‚Ì240pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡ƒŒƒxƒ‹ƒRƒ“ƒo[ƒ^‚É‚æ‚é5Vƒ†[ƒUI/O
¡“‹ÚƒfƒoƒCƒXF
EP3C16Q240C8N
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pƒXƒCƒbƒ`@x1
¡”Ä—pLED@x2
¡ƒXƒe[ƒ^ƒXLED (Power, CONF_DONE)
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡JTAG—pƒRƒlƒNƒ^
¡5V’Pˆê“dŒ¹
¡6‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone III
¡5V user I/O with Bus transceivers
¡on bord FPGA:
EP3C16Q240C8N
¡Configuration Device
¡on-board oscillators :30 MHz
¡100 I/O PAD 100 mil (2.54 mm) grid
¡User Switch (Slide)
¡User LED x2
¡Status LED (Power, CONF_DONE)
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡5 V single power supply operation
¡High quality six layer PCB.(Immersion gold)
ACM-029YƒVƒŠ[ƒY
Cyclone III Q240 ƒuƒŒƒbƒhƒ{[ƒh


[LED] [IO:100]
¡Cyclone III‚Ì240pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡ƒoƒXƒXƒCƒbƒ`‚É‚æ‚é5Vƒ†[ƒUI/O
¡“‹ÚƒfƒoƒCƒXF
EP3C16Q240C8N
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pƒXƒCƒbƒ`@x1
¡”Ä—pLED@x2
¡ƒXƒe[ƒ^ƒXLED (Power, CONF_DONE)
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡JTAG—pƒRƒlƒNƒ^
¡5V’Pˆê“dŒ¹
¡6‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone III
¡5V user I/O with Bus switches
¡on bord FPGA:
EP3C16Q240C8N
¡Configuration Device
¡on-board oscillators :30 MHz
¡100 I/O PAD 100 mil (2.54 mm) grid
¡User Switch (Slide)
¡User LED x2
¡Status LED (Power, CONF_DONE)
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡5 V single power supply operation
¡High quality six layer PCB.(Immersion gold)
ACM-105ƒVƒŠ[ƒY
CycloneIII F484 ƒuƒŒƒbƒhƒ{[ƒh


[SW] [LED] [IO:128]
¡Cyclone‡V‚ÌFBGA484pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP3C16F484C8N
EP3C55F484C8N
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡128–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pƒ^ƒNƒgƒXƒCƒbƒ` 1ŒÂ
¡”Ä—pLED 1ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹(
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡6‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone III
¡on bord FPGA:
EP3C16F484C8N
EP3C55F484C8N
¡Configuration Device
¡JTAG port (10 pin socket)
¡30 MHz Oscillator(50 ppm)or External
¡128 I/O tow 80 pin HIROSE connectors
¡User Push-Button Switch x1
¡User LED x1
¡Status LED x2
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality six layer PCB.(Immersion gold)
ACM-202ƒVƒŠ[ƒY
CycloneIII F780 ƒuƒŒƒbƒhƒ{[ƒh


[SW] [LED] [IO:296]
¡Cyclone‡V‚ÌFBGA780pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP3C55F780C8N
EP3C80F780C8N
EP3C120F780C8N
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHzA50MHz
¡296–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pƒ^ƒNƒgƒXƒCƒbƒ` 2ŒÂ
¡”Ä—pLED 2ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹(
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡8‘wŠî”̗p
¡I/O‚Ì”zü’·ƒRƒ“ƒgƒ[ƒ‹
¡FPGA board equipped with Altera Cyclone III
¡on bord FPGA:
EP3C55F780C8N
EP3C80F780C8N
EP3C120F780C8N

¡Configuration Device
¡30 MHz/50 MHz Oscillator (50 ppm) or External
¡JTAG port (10 pin socket)
¡296 I/O, Four HIROSE connectors
¡User Push-Button Switch x2
¡User LED x2
¡Status LED x2
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality eight layer PCB.(Immersion gold)
ACM-203ƒVƒŠ[ƒY
CycloneIII F484 ƒuƒŒƒbƒhƒ{[ƒh


[SW] [LED] [IO:262]
¡Cyclone‡V‚ÌFBGA484pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP3C16F484C8N
EP3C40F484C8N
EP3C55F484C8N
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHzA50MHz
¡262–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pƒ^ƒNƒgƒXƒCƒbƒ` 2ŒÂ
¡”Ä—pLED 2ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹(
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡10‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone III
¡on bord FPGA:
EP3C16F484C8N
EP3C40F484C8N
EP3C55F484C8N
¡Configuration Device
¡JTAG port (10 pin socket)
¡30 MHz/50 MHz Oscillator (50 ppm) or External
¡262 I/O, Four HIROSE connectors
¡User Push-Button Switch x2
¡User LED x2
¡Status LED x2
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality ten layer PCB.(Immersion gold)
ACM-304ZƒVƒŠ[ƒY
CycloneIII Q240 FPGAƒ{[ƒh


[SW] [LED] [IO:56]
¡Cyclone‡V‚Ì240pinQFP‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡ACM-304ƒVƒŠ[ƒY‚©‚çMRAM‚ðÈ‚¢‚œ‚à‚Ì‚Å‚·
¡“‹ÚƒfƒoƒCƒX
EP3C16Q240C8N
EP3C40Q240C8N
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡56–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡ƒ^ƒNƒgƒXƒCƒbƒ` 1ŒÂ
¡”Ä—pLED 1ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹(
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡6‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone II
¡No MRAM version of ACM-304
¡on bord FPGA:
EP3C16Q240C8N
EP3C40Q240C8N
¡Configuration Device
¡JTAG port (10 pin socket)
¡30 MHz Oscillator (50 ppm) or External
¡56 I/O PAD 100 mil (2.54 mm) grid
¡User Push-Button Switch x1
¡User LED x1
¡Status LED x2
¡Power-on Reset IC
¡3.3 V single power supply operation
¡Separable VCCIO
¡High quality six layer PCB.(Immersion gold)
EDA-004
Cyclone‡VUSB-FPGAƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone‡V‚ÌFBGA780pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP3C55F780C8N
¡USBŒo—R‚ÅFPGAƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“
¡5V“dŒ¹“®ì
¡USBƒ|[ƒg‚É‚æ‚è‚o‚b‚ƒʐMUSB’ʐM‚ª‰Â”\
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM“‹Ú
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡MRAM
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡6‘wŠî”̗p
¡“dŒ¹FŠO•”DC5V
¡USBƒ‰ƒCƒ“‚ÌESD•ÛŒì‚š‚æ‚уT[ƒW•ÛŒì
¡ƒ†[ƒUI/O 100–{
¡FPGA board equipped with Altera Cyclone III
¡on bord FPGA: EP3C55F780C8N
¡FPGA configuration via USB interface
¡Power : 5.0 V single supply
¡Configuration Device
¡Resister-protected 100 I/O, PAD 100 mil (2.54 mm) grid
¡FPGA configuration through JTAG
¡FPGA configuration through USB
¡User communication through USB
¡50 MHz Oscillator(50 ppm)or External input
¡MRAM
¡User Push-Button Switch x1
¡User LED x3
¡Status LED x2 (Power, Done)
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡High quality six layer PCB.(Immersion gold)
¡ESD and Surge protection for USB
EDA-004Z
Cyclone‡VUSB-FPGAƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone‡V‚ÌFBGA780pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡EDA-004‚©‚çMRAM‚ðÈ‚¢‚œ‚à‚Ì‚Å‚·
¡“‹ÚƒfƒoƒCƒXFEP3C55F780C8N
¡USBƒ|[ƒg‚É‚æ‚è‚o‚b‚ƒʐMUSB’ʐM‚ª‰Â”\
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM“‹Ú
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡6‘wŠî”̗p
¡“dŒ¹FŠO•”DC5V
¡USBƒ‰ƒCƒ“‚ÌESD•ÛŒì‚š‚æ‚уT[ƒW•ÛŒì
¡ƒ†[ƒUI/O 100–{
¡FPGA board equipped with Altera Cyclone III
¡No MRAM version of EDA-004
¡on bord FPGA: EP3C55F780C8N
¡FPGA configuration via USB interface
¡Power : 5.0 V single supply
¡Configuration Device
¡Resister-protected 100 I/O, PAD 100 mil (2.54 mm) grid
¡FPGA configuration through JTAG
¡FPGA configuration through USB
¡User communication through USB
¡50 MHz Oscillator(50 ppm)or External input
¡User Push-Button Switch x1
¡User LED x3
¡Status LED (Power, Done)
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡High quality six layer PCB.(Immersion gold)
¡ESD and Surge protection for USB
Cyclone‡U“‹Úƒ{[ƒh@
ACM-014-8
CycloneII Q208 ƒuƒŒƒbƒhƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone‡U‚ÌTQ208pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒXFEP2C8Q208C8
¡ASƒ‚[ƒh—pƒRƒlƒNƒ^
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡SRAM
¡ƒVƒŠƒAƒ‹FLASH-ROM
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—p‰Ÿ‚µƒ{ƒ^ƒ“ƒXƒCƒbƒ` 1ŒÂ
¡”Ä—pLED 1ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡ƒVƒŠƒAƒ‹I/F‚ÉŽg‚Š‚éTXDARXD—p3ƒsƒ“ƒwƒbƒ_
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹(
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡4‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone II
¡on bord FPGA: EP2C8Q208C8N
¡SERIAL-FLASH-ROM
¡SRAM
¡Configuration Device
¡100 I/O PAD 100 mil (2.54 mm) grid
¡Separable VCCIO
¡30 MHz Oscillator(50 ppm)or External
¡User Switch x1
¡User LED x1
¡Status LED x2
¡Directly connected pin header interface for serial communication(TTL)
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡AS mode port@(10 pin socket)
¡3.3 V single power supply operation
¡High quality four layer PCB.(Immersion gold)
ACM-015ƒVƒŠ[ƒY
CycloneII T144 ƒuƒŒƒbƒhƒ{[ƒh


[IO:75]
¡Cyclone‡U‚ÌTQ144pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP2C5T144C8N
EP2C8T144C8N
¡ASƒ‚[ƒh—pƒRƒlƒNƒ^
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡75–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹(
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡4‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone II
¡on bord FPGA:

EP2C5T144C8N
EP2C8T144C8N
----------------
[Domestic sale only]
ACM-201ƒVƒŠ[ƒY
CycloneII F672 ƒuƒŒƒbƒhƒ{[ƒh


[SW] [LED] [IO:296]
¡Cyclone‡U‚ÌFG672pinBGA‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP2C35F672C8N
EP2C70F672C8N
¡ASƒ‚[ƒh—pƒRƒlƒNƒ^
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHzA18.432MHz
¡SRAM
¡SDRAM
¡ƒVƒŠƒAƒ‹FLASH-ROM
¡296–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡”Ä—p‰Ÿ‚µƒ{ƒ^ƒ“ƒXƒCƒbƒ` 2ŒÂ
¡”Ä—pLED 2ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡”gŒ`ƒ`ƒFƒbƒN‚É•Ö—˜‚ȃeƒXƒg—pƒpƒbƒh 3“_
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹(
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡10‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone II
¡on bord FPGA:

EP2C35F672C8N
EP2C70F672C8N
¡Configuration Device
¡Serial Flash Memory
¡SRAM
¡SDRAM
¡296 I/O, Four HIROSE connectors
¡Separable VCCIO
¡18.432 MHz/30 MHz Oscillator (50 ppm) or External
¡User Push-Button Switch x2
¡User LED x2
¡Status LED x2
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡AS mode port (10 pin Socket)
¡3.3 V single power supply operation
¡High quality ten layer PCB.(Immersion gold)
ACM-301ƒVƒŠ[ƒY
CycloneII T144 ƒuƒŒƒbƒhƒ{[ƒh


[LED] [IO:566]
¡Cyclone‡U‚ÌT144pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP2C5T144C8N
EP2C8T144C8N
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡56–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡”Ä—pLED 1ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹(
¡ˆê•”‚ÌVCCIO‚𕪗£‰Â”\
¡4‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone II
¡on bord FPGA:
EP2C5T144C8N
EP2C8T144C8N
----------------
[Domestic sale only]
EDA-003
Cyclone‡UUSB-FPGAƒ{[ƒh


[LED] [IO:75]
¡Cyclone‡U‚Ì144pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒXFEP2C5T144C8N
¡USBŒo—R‚ÅFPGAƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“
¡’ʐM—pUSBƒ|[ƒg
¡ÝŒvƒ~ƒX‚É‚æ‚éFPGA‚Ì•ÛŒì‚Ì‚œ‚ßI/O‚É•ÛŒì’ïR‚ð‘}“ü
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM“‹Ú
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHzA6MH‚š
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡4‘wŠî”̗p
¡“dŒ¹FUSB‚©‚ç‹Ÿ‹‹A‚Ü‚œ‚ÍŠO•”DC5V
¡ƒ†[ƒUI/O 75–{
¡FPGA board equipped with Altera Cyclone II
¡on bord FPGA:EP2C5T144C8N
¡FPGA configuration via USB interface
------------
[Domestic sale only]
@
Cyclone“‹Úƒ{[ƒh@
ACM-004-6
Cyclone T144 ƒuƒŒƒbƒhƒ{[ƒh


[IO:92]
¡Cyclone‚Ì144pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒXFEP1C6T144C8N
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡92–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡”Ä—pLED 1ŒÂ
¡ƒXƒe[ƒ^ƒXLED@1ŒÂ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹(
¡4‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone
¡on bord FPGA:EP1C6T144C8N

¡Configuration Device
¡88 I/O PAD 100 mil (2.54 mm) grid
¡Separable VCCIO
¡30 MHz Oscillator (50 ppm) or External
¡User LED x1
¡Status LED x1
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡AS mode port (10 pin Socket)
¡3.3 V single power supply operation
¡High quality four layer PCB.(Immersion gold)
ACM-006ƒVƒŠ[ƒY
Cyclone Q240 ƒuƒŒƒbƒhƒ{[ƒh


[IO:100]
¡Cyclone‚Ì240pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP1C6Q240C8N
EP1C12Q240C8N
¡ASƒ‚[ƒh—pƒRƒlƒNƒ^
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒXƒe[ƒ^ƒXLED@1ŒÂ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡3.3V’Pˆê“dŒ¹
¡ˆê•”‚ÌVCCIO‚ð‚QŒn“‚É•ª—£‰Â”\
¡4‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone
¡on bord FPGA:
EP1C6Q240C8N
EP1C12Q240C8N
¡Configuration Device
¡100 I/O PAD 100 mil (2.54 mm) grid
¡Separable VCCIO
¡30 MHz Oscillator (50 ppm) or External
¡Status LED x1
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡AS mode port (10 pin Socket)
¡3.3 V single power supply operation
¡High quality four layer PCB.(Immersion gold)
ACM-012ƒVƒŠ[ƒY
Cyclone Q240 ƒuƒŒƒbƒhƒ{[ƒh


[LED] [IO:100]
¡Cyclone‚Ì240pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡ƒŒƒxƒ‹ƒRƒ“ƒo[ƒ^‚É‚æ‚é5Vƒ†[ƒUI/O
¡“‹ÚƒfƒoƒCƒXF
EP1C6Q240C8N
EP1C12Q240C8N
¡ASƒ‚[ƒh—pƒRƒlƒNƒ^
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡”Ä—pLED@2ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡5V’Pˆê“dŒ¹
¡6‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone
¡5V user I/O with Bus transceivers
¡on bord FPGA:
EP1C6Q240C8N
EP1C12Q240C8N
¡Configuration Device
¡100 I/O PAD 100 mil (2.54 mm) grid
¡5 V I/O support
¡30 MHz Oscillator (50 ppm) or External
¡User LED x2
¡Status LED x2
¡Controllable level converter data direction pins
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡AS mode port (10 pin Socket)
¡5 V single power supply operation
¡High quality six layer PCB.(Immersion gold)
ACM-012YƒVƒŠ[ƒY
Cyclone Q240 ƒuƒŒƒbƒhƒ{[ƒh


[LED] [IO:100]
¡Cyclone‚Ì240pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡ƒoƒXƒXƒCƒbƒ`‚É‚æ‚é5Vƒ†[ƒUI/O
¡“‹ÚƒfƒoƒCƒXF
EP1C6Q240C8N
EP1C12Q240C8N
¡ASƒ‚[ƒh—pƒRƒlƒNƒ^
¡JTAG—pƒRƒlƒNƒ^
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡”Ä—pLED@2ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡5V’Pˆê“dŒ¹
¡6‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone
¡5V user I/O with Bus switches
¡on bord FPGA:
EP1C6Q240C8N
EP1C12Q240C8N
¡Configuration Device
¡100 I/O PAD 100 mil (2.54 mm) grid
¡5V I/O support with Bus switch ICs
¡30 MHz Oscillator (50 ppm) or External
¡User LED x2
¡Status LED x2
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡AS mode port (10 pin Socket)
¡5 V single power supply operation
¡High quality six layer PCB.(Immersion gold)
@
MAX‡U“‹Úƒ{[ƒh@
ACM-001-1270
MAXII T144ƒuƒŒƒbƒhƒ{[ƒh


[IO:100]
¡MAX‡U‚Ì144pin‚𓋍ڂµ‚œCPLDƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EPM1270T144C5N
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pLED@4ŒÂi“ü—̓Wƒƒƒ“ƒpŒ“—pj
¡3.3V’Pˆê“dŒ¹
¡ƒŠƒZƒbƒg‹@”\“‹Ú
¡4‘wŠî”̗p
¡FPGA board equipped with Altera MAX II
¡on bord FPGA:
EPM1270T144C5N
¡100 I/O PAD 100 mil (2.54 mm) grid
¡3.3 V single power supply operation
¡30 MHz Oscillator (50 ppm) or External
¡Four LEDs or Four Input Port (Selectable)
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡High quality four layer PCB.(Immersion gold)
ACM-002-2210
MAXII F256 ƒuƒŒƒbƒhƒ{[ƒh


[LED] [IO:100]
¡MAX‡U‚ÌFBGA256pin‚𓋍ڂµ‚œCPLDƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EPM2210F256C5N
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pLED@4ŒÂ
¡3.3V’Pˆê“dŒ¹
¡ƒIƒvƒVƒ‡ƒ“‚ŃŠƒZƒbƒg‹@”\•t‚«2.5V“dŒ¹ASRAM‚ð’ljÁ‰Â”\
¡6‘wŠî”̗p
¡FPGA board equipped with Altera MAX II
¡on bord FPGA:
EPM2210F256C5N
¡100 I/O PAD 100 mil (2.54 mm) grid
¡3.3 V single power supply operation
¡30 MHz Oscillator (50 ppm) or External
¡User LED x4
¡Option-1: 2.5 V regulator IC with power on reset function
¡Option-2: SRAM
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡High quality six layer PCB.(Immersion gold)
ACM-005-240
MAXII T100 ƒuƒŒƒbƒhƒ{[ƒh


[LED] [IO:80]
¡MAX‡U‚Ì100pin‚𓋍ڂµ‚œCPLDƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EPM240T100C5N
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡80–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡JTAG—pƒRƒlƒNƒ^
¡”Ä—pLED@2ŒÂ(I/O‚Æ‹€—L)
¡3.3V’Pˆê“dŒ¹
¡4‘wŠî”̗p
¡FPGA board equipped with Altera MAX II
¡on bord FPGA:
EPM240T100C5N
¡80 I/O PAD 100 mil (2.54 mm) grid
¡3.3 V single power supply operation
¡30 MHz Oscillator (50 ppm) or External
¡User LED x2 (Connected to two user I/O ports)
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡High quality four layer PCB.(Immersion gold)
ACM-302-1270
MAXII T144 ƒuƒŒƒbƒhƒ{[ƒh


[SW] [LED] [IO:56]
¡MAX‡U‚Ì144pin‚𓋍ڂµ‚œCPLDƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EPM1270T144C5N
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ 30MHz
¡56–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡JTAG—pƒRƒlƒNƒ^
¡”Ä—pLED@4ŒÂ
¡”Ä—p‰Ÿ‚µƒ{ƒ^ƒ“ƒXƒCƒbƒ`@2ŒÂ
¡ƒŠƒZƒbƒgIC
¡3.3V’Pˆê“dŒ¹
¡4‘wŠî”̗p
¡FPGA board equipped with Altera MAX II
¡on bord FPGA:
EPM1270T144C5N
¡56 I/O PAD 100 mil (2.54 mm) grid
¡3.3 V single power supply operation
¡30 MHz Oscillator (50 ppm) or External
¡User LED x4
¡User Push-Button Switch x2
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡High quality four layer PCB.(Immersion gold)
@
MAX7000S“‹Úƒ{[ƒh@
ACM-003-7192
MAX7000S 160pinƒuƒŒƒbƒhƒ{[ƒh

[IO:100]
¡MAX7000S‚Ì160pin‚𓋍ڂµ‚œCPLDƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EPM7192SQC160-15
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@ EXO-03i72KHzA18.432MHzj
ŠEXO-03”pŽ~Œã‚Í18.432MHz…»”­UŠí‚ɐ؂è‘Ö‚í‚é‚œ‚߁A72KHz‚ÌŽg—p‚Í”ñ„§
¡100–{‚ÌI/Oƒsƒ“‚ðŠO•”ˆø‚«o‚µ
¡”Ä—pLED@i“ü—̓Wƒƒƒ“ƒpŒ“—pj
¡5V’Pˆê“dŒ¹
¡4‘wŠî”̗p
¡3.3VƒŒƒMƒ…ƒŒ[ƒ^‚ƃŠƒZƒbƒgICƒIƒvƒVƒ‡ƒ“ŽÀ‘•‰Â”\
¡FPGA board equipped with Altera MAX II
¡on bord FPGA:
EPM7192SQC160-15
------------
[Domestic sale only]
‹³ˆç—pƒ{[ƒh @
EDA-004
Cyclone‡V@USB-FPGAƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone‡V‚ÌFBGA780pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒX
EP3C55F780C8N
¡USBŒo—R‚ÅFPGAƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“
¡5V“dŒ¹“®ì
¡USBƒ|[ƒg‚É‚æ‚è‚o‚b‚ƒʐMUSB’ʐM‚ª‰Â”\
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM“‹Ú
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡MRAM
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡6‘wŠî”̗p
¡“dŒ¹FŠO•”DC5V
¡USBƒ‰ƒCƒ“‚ÌESD•ÛŒì‚š‚æ‚уT[ƒW•ÛŒì
¡ƒ†[ƒUI/O 100–{
¡FPGA board equipped with Altera Cyclone III
¡on bord FPGA: EP3C55F780C8N
¡FPGA configuration via USB interface
¡Power : 5.0 V single supply
¡Configuration Device
¡Resister-protected 100 I/O, PAD 100 mil (2.54 mm) grid
¡FPGA configuration through JTAG
¡FPGA configuration through USB
¡User communication through USB
¡50 MHz Oscillator(50 ppm)or External input
¡User Push-Button Switch x1
¡User LED x3
¡Status LED (Power, Done)
¡MRAM
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡High quality six layer PCB.(Immersion gold)
¡ESD and Surge protection for USB
EDA-004Z
Cyclone‡VUSB-FPGAƒ{[ƒh


[SW] [LED] [IO:100]
¡Cyclone‡V‚ÌFBGA780pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡EDA-004‚©‚çMRAM‚ðÈ‚¢‚œ‚à‚Ì‚Å‚·
¡“‹ÚƒfƒoƒCƒXFEP3C55F780C8N
¡USBƒ|[ƒg‚É‚æ‚è‚o‚b‚ƒʐMUSB’ʐM‚ª‰Â”\
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM“‹Ú
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡6‘wŠî”̗p
¡“dŒ¹FŠO•”DC5V
¡USBƒ‰ƒCƒ“‚ÌESD•ÛŒì‚š‚æ‚уT[ƒW•ÛŒì
¡ƒ†[ƒUI/O 100–{
¡FPGA board equipped with Altera Cyclone III
¡No MRAM version of EDA-004
¡on bord FPGA: EP3C55F780C8N
¡FPGA configuration via USB interface
¡Power : 5.0 V single supply
¡Configuration Device
¡Resister-protected 100 I/O, PAD 100 mil (2.54 mm) grid
¡FPGA configuration through JTAG
¡FPGA configuration through USB
¡User communication through USB
¡50 MHz Oscillator(50 ppm)or External input
¡User Push-Button Switch x1
¡User LED x3
¡Status LED (Power, Done)
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡High quality six layer PCB.(Immersion gold)
¡ESD and Surge protection for USB
EDA-301
Cyclone IV USB-FPGAƒ{[ƒh


[SW] [LED] [IO:56]
¡Cyclone IV‚ÌFBGA256pin‚𓋍ڂµ‚œFPGAƒ{[ƒh
¡“‹ÚƒfƒoƒCƒXFEP4CE15F17C8N

¡USBŒo—R‚ÅFPGAƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“
¡USBƒ†[ƒU’ʐMƒ|[ƒg
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“ROM
¡ƒIƒ“ƒ{[ƒhƒNƒƒbƒN@50MHz
¡ƒRƒ“ƒtƒBƒMƒ…ƒŒ[ƒVƒ‡ƒ“—pƒŠƒZƒbƒg‰ñ˜H
¡‰Ÿ‚µƒ{ƒ^ƒ“ƒXƒCƒbƒ`@1ŒÂ
¡ƒfƒBƒbƒvƒXƒCƒbƒ`@1‰ñ˜H
¡”Ä—pLED@4ŒÂ
¡7ƒZƒOƒƒ“ƒgLED•\ŽŠŠí@1ŒÂ
¡ƒXƒe[ƒ^ƒXLED@2ŒÂ
¡5V“dŒ¹“®ì
¡CNB‚ÌI/O“dŒ¹iVIO(B)j‚ð•Ê“r‹Ÿ‹‹‰Â”\
¡6‘wŠî”̗p
¡FPGA board equipped with Altera Cyclone IV E
¡on bord FPGA: EP4CE15F17C8N
¡FPGA configuration via USB interface
¡Configuration Device

¡USB control IC
¡50MHz Oscillator (50 ppm)
¡User Switch
¡User LED x4
¡Seven segment LED module x1
¡Status LED (Power, Done)
¡Power-on Reset IC
¡JTAG port (10 pin socket)
¡JTAG buffer for stable download or debug
¡5.0 V single power supply operation
¡High quality six layer PCB.(Immersion gold)
¡ESD and Surge protection component for USB I/F
ƒ_ƒEƒ“ƒ[ƒhƒP[ƒuƒ‹ @
1-TB1 2-TB1
Terasic USB Blaster
(USB BlasterŒÝŠ·)
Terasic USB Blaster
2‘äƒZƒbƒg


[USB][ALTERA]][—A“ü•i] [USB][ALTERA][—A“ü•i]
¡ƒAƒ‹ƒeƒ‰ŽÐ‚ÌUSB‘Ήžƒ_ƒEƒ“ƒ[ƒhƒP[ƒuƒ‹@USB Blaster‚̌݊·•i
¡ƒAƒ‹ƒeƒ‰ŽÐ‚ÌŠJ”­ƒc[ƒ‹QuartusII‚©‚çUSB Blaster‚Æ‚µ‚ÄŽg—p‚·‚邱‚Æ‚ª‚Å‚«‚Ü‚·
¡ƒ³•i‚Æ‚Ì”ƒ‚¢Š·‚Š•ÛØ•t‚Í‚ ‚è‚Ü‚¹‚ñ
¡ƒ}ƒjƒ…ƒAƒ‹‚Í•t‘®‚µ‚Ü‚¹‚ñ
¡Terasic Blaster
2‘äƒZƒbƒg
¡USBƒP[ƒuƒ‹@‚˜@2–{
¡ƒ†[ƒU“o˜^‚Í‚ª‚«
¡”ƒŠ·•ÛØ‚ƃ}ƒjƒ…ƒAƒ‹‚Í•t‘®‚µ‚Ü‚¹‚ñ
@
bALTERAƒVƒŠ[ƒYTOP‚ցb
mProducts Guide 2015n
bALTERAƒVƒŠ[ƒYbXILINXƒVƒŠ[ƒYbPLCC68ƒVƒŠ[ƒYbƒAƒNƒZƒTƒŠbUSBƒVƒŠ[ƒYbFTDIƒVƒŠ[ƒYbUTLƒVƒŠ[ƒYb
@