/*** */ /** RS232MEM_TOP **/ /* ***/ module RS232MEM_TOP( CLK, SW2, RXD, TXD, LED, SA ); input CLK, SW2, RXD; output TXD; output [6:0] LED; output [5:0] SA; wire TX_EN, RX_EN, RDEN ; wire [7:0] ASCII; wire [7:0] ADRS; wire [7:0] HIBYTE; wire [7:0] LOBYTE; RS232C_CLKGEN U0( CLK, RST, TX_EN, RX_EN ); RS232C_RX U1( CLK, RST, RX_EN, RXD, ASCII, RDEN ); RS232C_TX U2( CLK, RST, TX_EN, RDEN, ASCII, TXD ); SEG_CTL U3( CLK, TX_EN, RST, LOBYTE[3:0], LOBYTE[7:4], HIBYTE[3:0], HIBYTE[7:4], ADRS [3:0], ADRS [7:4], LED, SA ); MEMORY_CONTROL U4( CLK, RST, RDEN, ASCII, ADRS, HIBYTE, LOBYTE ); assign RST = ~SW2; endmodule