*PADS-PCB* *NET* *SIGNAL* V25_FPLL C2.1 EM2.1 FC19.1 FC20.1 FPGA.F5 FPGA.F15 FPGA.H3 FPGA.N5 FPGA.N15 *SIGNAL* V25_AUX C4.1 EM3.1 FC21.1 FC23.1 FPGA.C10 FPGA.D14 FPGA.E6 FPGA.R6 FPGA.R14 FPGA.T10 *SIGNAL* V11ORG C1.1 EM1.1 R1.1 U1.5 U1.6 U1.7 U1.15 *SIGNAL* V11 C6.1 C7.1 EM1.3 FC1.1 FC2.1 FC3.1 FC4.1 FPGA.G8 FPGA.G10 FPGA.G12 FPGA.H7 FPGA.H9 FPGA.H11 FPGA.J8 FPGA.J10 FPGA.J12 FPGA.K7 FPGA.K9 FPGA.K11 FPGA.L8 FPGA.L10 FPGA.L12 FPGA.M11 TP1.1 *SIGNAL* NetR2_1 R2.1 R3.1 *SIGNAL* NetR1_2 R1.2 R2.2 U1.16 *SIGNAL* NetFPGA_A1 FPGA.A1 R4.1 *SIGNAL* NetC14_1 C14.1 U2.4 *SIGNAL* VCCPDB C16.1 FPGA.R8 FPGA.R12 U9.6 *SIGNAL* NetFPGA_P13 FPGA.P13 FPGA.U14 *SIGNAL* VCCPDA C15.1 FPGA.H15 FPGA.J5 FPGA.K4 U8.6 *SIGNAL* V25 C3.1 EM2.3 EM3.3 FC24.1 FPGA.C5 TP2.1 U2.5 U8.1 U8.2 U9.1 U9.2 *SIGNAL* FRAM_WE FPGA.A11 R17.2 U6.G5 *SIGNAL* FRAM_UB FPGA.B8 U6.B2 *SIGNAL* FRAM_OE FPGA.E9 R18.2 U6.A2 *SIGNAL* FRAM_LB FPGA.J14 U6.A1 *SIGNAL* FRAM_DQ15 FPGA.B15 U6.G1 *SIGNAL* FRAM_DQ14 FPGA.B9 U6.F1 *SIGNAL* FRAM_DQ13 FPGA.D13 U6.F2 *SIGNAL* FRAM_DQ12 FPGA.E11 U6.E2 *SIGNAL* FRAM_DQ11 FPGA.A9 U6.D2 *SIGNAL* FRAM_DQ10 FPGA.D10 U6.C2 *SIGNAL* FRAM_DQ9 FPGA.C13 U6.C1 *SIGNAL* FRAM_DQ8 FPGA.G13 U6.B1 *SIGNAL* FRAM_DQ7 FPGA.C16 U6.G6 *SIGNAL* FRAM_DQ6 FPGA.D16 U6.F6 *SIGNAL* FRAM_DQ5 FPGA.B10 U6.F5 *SIGNAL* FRAM_DQ4 FPGA.E14 U6.E5 *SIGNAL* FRAM_DQ3 FPGA.E12 U6.D5 *SIGNAL* FRAM_DQ2 FPGA.J16 U6.C6 *SIGNAL* FRAM_DQ1 FPGA.J13 U6.C5 *SIGNAL* FRAM_DQ0 FPGA.L16 U6.B6 *SIGNAL* FRAM_CE2 FPGA.K17 R22.2 U6.A6 *SIGNAL* FRAM_CE FPGA.H13 R19.2 U6.B5 *SIGNAL* FRAM_A18 FPGA.A17 U6.H1 *SIGNAL* FRAM_A17 FPGA.J15 R23.2 U6.D3 *SIGNAL* FRAM_A16 FPGA.C11 U6.E4 *SIGNAL* FRAM_A15 FPGA.B12 U6.F4 *SIGNAL* FRAM_A14 FPGA.B14 U6.F3 *SIGNAL* FRAM_A13 FPGA.B18 U6.G4 *SIGNAL* FRAM_A12 FPGA.A12 U6.G3 *SIGNAL* FRAM_A11 FPGA.B17 U6.H5 *SIGNAL* FRAM_A10 FPGA.A16 U6.H4 *SIGNAL* FRAM_A9 FPGA.A14 U6.H3 *SIGNAL* FRAM_A8 FPGA.A15 U6.H2 *SIGNAL* FRAM_A7 FPGA.D11 U6.D4 *SIGNAL* FRAM_A6 FPGA.L15 U6.C4 *SIGNAL* FRAM_A5 FPGA.D9 U6.C3 *SIGNAL* FRAM_A4 FPGA.K13 U6.B4 *SIGNAL* FRAM_A3 FPGA.B7 U6.B3 *SIGNAL* FRAM_A2 FPGA.K18 U6.A5 *SIGNAL* FRAM_A1 FPGA.L17 U6.A4 *SIGNAL* FRAM_A0 FPGA.N18 U6.A3 *SIGNAL* XTMS FPGA.P6 R6.2 RM1.6 *SIGNAL* XTDO FPGA.P5 RM1.7 *SIGNAL* XTDI FPGA.N6 R7.2 RM1.5 *SIGNAL* XTCK FPGA.L6 R9.1 *SIGNAL* XNSTATUS FPGA.D6 R16.2 *SIGNAL* XNCONFIG FPGA.D4 R14.1 R15.2 *SIGNAL* XNCONDONE FPGA.C6 R5.2 U3.1 *SIGNAL* XDCLK FPGA.K6 R12.1 *SIGNAL* XDATA3 FPGA.M5 U4.7 *SIGNAL* XDATA2 FPGA.U3 U4.3 *SIGNAL* XDATA1 FPGA.U2 U4.2 *SIGNAL* XDATA0 FPGA.V1 U4.5 *SIGNAL* X_NCSO FPGA.P3 R13.1 U4.1 *SIGNAL* VIOB C10.1 C11.1 CN1.11 CN1.28 FC15.1 FC16.1 FPGA.R15 FPGA.T8 FPGA.T18 FPGA.U10 FPGA.U11 FPGA.U16 FPGA.V9 FPGA.V11 U9.3 U10.6 *SIGNAL* VIOA C8.1 C9.1 CN1.45 CN1.62 FC10.1 FC11.1 FC12.1 FPGA.E17 FPGA.F18 FPGA.G16 FPGA.H4 FPGA.J2 FPGA.L3 FPGA.N1 FPGA.P2 U8.3 *SIGNAL* V33P C5.1 C12.1 C13.1 CN1.35 CN1.36 FC5.1 FC6.1 FC7.1 FC8.1 FC9.1 FC14.1 FC17.1 FC18.1 FC22.1 FC25.1 FC26.1 FPGA.A13 FPGA.B6 FPGA.B13 FPGA.B16 FPGA.C7 FPGA.C9 FPGA.C14 FPGA.D8 FPGA.E7 FPGA.E13 FPGA.E15 FPGA.G4 FPGA.K14 FPGA.K15 FPGA.M15 FPGA.M16 FPGA.M17 FPGA.R5 FPGA.R7 FPGA.T6 FPGA.U6 FPGA.V5 R5.1 R6.1 R7.1 R8.1 R13.2 R15.1 R16.1 R17.1 R18.1 R19.1 R22.1 R23.1 U1.1 U1.2 U1.17 U1.18 U1.19 U1.20 U2.1 U2.3 U3.5 U4.8 U5.3 U6.D6 U6.E1 U7.4 U10.1 U10.5 *SIGNAL* NetR20_2 R20.2 U7.3 U10.3 *SIGNAL* NetR14_2 R14.2 U5.2 *SIGNAL* NetR12_2 R12.2 U4.6 *SIGNAL* NetR11_1 R11.1 RM1.8 U3.3 *SIGNAL* NetR10_2 R10.2 U3.6 *SIGNAL* NetR9_2 R9.2 U3.4 *SIGNAL* NetL1_1 L1.1 R10.1 *SIGNAL* NetCN1_37 CN1.37 RM1.4 *SIGNAL* NetCN1_34 CN1.34 RM1.3 *SIGNAL* NetCN1_33 CN1.33 RM1.2 *SIGNAL* NetCN1_32 CN1.32 RM1.1 *SIGNAL* MSEL1 FPGA.H5 R8.2 SW1.2 *SIGNAL* GND C1.2 C2.2 C3.2 C4.2 C5.2 C6.2 C7.2 C8.2 C9.2 C10.2 C11.2 C12.2 C13.2 C14.2 C15.2 C16.2 CN1.9 CN1.10 CN1.26 CN1.27 CN1.43 CN1.44 CN1.60 CN1.61 EM1.2 EM2.2 EM3.2 FC1.2 FC2.2 FC3.2 FC4.2 FC5.2 FC6.2 FC7.2 FC8.2 FC9.2 FC10.2 FC11.2 FC12.2 FC14.2 FC15.2 FC16.2 FC17.2 FC18.2 FC19.2 FC20.2 FC21.2 FC22.2 FC23.2 FC24.2 FC25.2 FC26.2 FPGA.A3 FPGA.A8 FPGA.A18 FPGA.B1 FPGA.B11 FPGA.C4 FPGA.D2 FPGA.D3 FPGA.D5 FPGA.D7 FPGA.D12 FPGA.D15 FPGA.D17 FPGA.E4 FPGA.E5 FPGA.E10 FPGA.F3 FPGA.F8 FPGA.F13 FPGA.G1 FPGA.G5 FPGA.G7 FPGA.G9 FPGA.G11 FPGA.H6 FPGA.H8 FPGA.H10 FPGA.H12 FPGA.H14 FPGA.J6 FPGA.J7 FPGA.J9 FPGA.J11 FPGA.J17 FPGA.K5 FPGA.K8 FPGA.K10 FPGA.K12 FPGA.L7 FPGA.L9 FPGA.L11 FPGA.L18 FPGA.M1 FPGA.M6 FPGA.M12 FPGA.N4 FPGA.N9 FPGA.N14 FPGA.P7 FPGA.P12 FPGA.P17 FPGA.R10 FPGA.T3 FPGA.T13 FPGA.U1 FPGA.V4 FPGA.V14 FPGA.V18 L1.2 R3.2 R4.2 R11.2 SW1.1 U1.3 U1.4 U1.G U2.2 U3.2 U4.4 U5.1 U6.D1 U6.E6 U7.2 U8.4 U8.5 U9.4 U9.5 U10.2 *SIGNAL* GCLK50_7A FPGA.F12 R20.1 *SIGNAL* GCLK50_4A FPGA.T12 U10.4 *SIGNAL* IOB24 CN1.31 FPGA.M13 *SIGNAL* IOB23 CN1.30 FPGA.U5 *SIGNAL* IOB22 CN1.29 FPGA.U4 *SIGNAL* IOB21 CN1.25 FPGA.T9 *SIGNAL* IOB20 CN1.24 FPGA.R9 *SIGNAL* IOB19 CN1.23 FPGA.P14 *SIGNAL* IOB18 CN1.22 FPGA.P15 *SIGNAL* IOB17 CN1.21 FPGA.P16 *SIGNAL* IOB16 CN1.20 FPGA.R16 *SIGNAL* IOB15 CN1.19 FPGA.T16 *SIGNAL* IOB14 CN1.18 FPGA.R17 *SIGNAL* IOB13 CN1.17 FPGA.T17 *SIGNAL* IOB12 CN1.16 FPGA.U17 *SIGNAL* IOB11 CN1.15 FPGA.U18 *SIGNAL* IOB10 CN1.14 FPGA.V17 *SIGNAL* IOB9 CN1.13 FPGA.P9 *SIGNAL* IOB8 CN1.12 FPGA.P10 *SIGNAL* IOB7 CN1.8 FPGA.U9 *SIGNAL* IOB6 CN1.7 FPGA.V10 *SIGNAL* IOB5 CN1.6 FPGA.V8 *SIGNAL* IOB4 CN1.5 FPGA.U8 *SIGNAL* IOB3 CN1.4 FPGA.V7 *SIGNAL* IOB2 CN1.3 FPGA.V6 *SIGNAL* IOB1 CN1.2 FPGA.T11 *SIGNAL* IOB0 CN1.1 FPGA.R11 *SIGNAL* IOA24 CN1.38 FPGA.G2 *SIGNAL* IOA23 CN1.39 FPGA.E3 *SIGNAL* IOA22 CN1.40 FPGA.F2 *SIGNAL* IOA21 CN1.41 FPGA.L2 *SIGNAL* IOA20 CN1.42 FPGA.M2 *SIGNAL* IOA19 CN1.46 FPGA.E2 *SIGNAL* IOA18 CN1.47 FPGA.D1 *SIGNAL* IOA17 CN1.48 FPGA.E1 *SIGNAL* IOA16 CN1.49 FPGA.F1 *SIGNAL* IOA15 CN1.50 FPGA.H1 *SIGNAL* IOA14 CN1.51 FPGA.J1 *SIGNAL* IOA13 CN1.52 FPGA.K1 *SIGNAL* IOA12 CN1.53 FPGA.L1 *SIGNAL* IOA11 CN1.54 FPGA.P1 *SIGNAL* IOA10 CN1.55 FPGA.R1 *SIGNAL* IOA9 CN1.56 FPGA.R2 *SIGNAL* IOA8 CN1.57 FPGA.T1 *SIGNAL* IOA7 CN1.58 FPGA.N2 *SIGNAL* IOA6 CN1.59 FPGA.N3 *SIGNAL* IOA5 CN1.63 FPGA.T2 *SIGNAL* IOA4 CN1.64 FPGA.R3 *SIGNAL* IOA3 CN1.65 FPGA.M3 *SIGNAL* IOA2 CN1.66 FPGA.L4 *SIGNAL* IOA1 CN1.67 FPGA.G14 *SIGNAL* IOA0 CN1.68 FPGA.F14 *END*